OAP

The architecture enables a standardized connection of the system on communication interfaces. On the one hand for specialized commissioning and research tools, on the other hand a connection to different field buses is possible. Here, another advantage comes into action, because the change from one fieldbus to another does not require a change of hardware anymore, but can be achieved by a change of the FPGA design.

The OAP offers openness on the following three levels.

At the lowest level, a large number of interfaces are available, which can be combined in a modular and application-specific manner. These are, for example, drivers, encoder interfaces, power drivers, communication modules, etc. The FPGA itself is coupled to the interfaces via a uniform interface. For most applications, commercially available FPGA prototyping boards are used, thus profitting from the rapidly developing FPGA technology.

The FPGA level also has a modular structure. The system-on-a-programmable-chip (SOPC) methodology is used. This enables an efficient system design based on individualized as well as standard components. A steadily growing collection of components is already available, for example for interfaces such as encoders or various fieldbuses, as well as for the implementation of controllers and models.

Two options can currently be used as a platform for the software: Either a so-called soft processor is used, which is synthesized from FPGA resources. Alternatively, software is executed on a hard processor, which is an integral part of the IC (e.g. an ARM processor). Depending on the application, either a special firmware or an operating system can be used. The software also has a modular structure, for which object-oriented concepts are used.